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PhD Defense
CMOS mm-Wave Frequency Synthesis for Communication and Radar Systems


Mr Qixian Shi - ETRO, Vrije Universiteit Brussel en IMEC [Email]


This PhD thesis focuses on the frequency synthesis blocks for millimeter wave applications including the 60GHz IEEE 802.11ad high-speed wireless communications and the 79GHz PMCW radar.
The thesis starts with the co-simulation of the digital baseband signal processing and the analog phase-locked-loop (PLL) to derive the optimal PLL bandwidth. Thanks to the common frequency offset removal technique in the digital domain, a narrow bandwidth PLL leads to the lowest EVM. To improve the narrow-band PLL noise performance, the flicker noise upconversion mechanisms are studied in detail. This thesis proposes a closed-form equation to quantitively analyze the flicker noise contribution of the cross-coupled pair transistors.
This thesis presents three different voltage-controlled oscillators (VCOs) for quadrature local oscillator (LO) signal implementation including a fundamental QVCO, a VCO with hybrid coupler and a subharmonic VCO with quadrature frequency multiplier. A self-calibration method is proposed in the QVCO to reduce the IQ imbalance. A wideband hybrid coupler is used to generate a quadrature LO signal from a fundamental, single-phase VCO. Although the phase noise of the first two implementations meets the requirements for mm-wave communication with QPSK modulation, these implementations are sensitive to pulling by the power amplifier when integrated with a direct-conversion transmitter. An LO architecture based on a subharmonic VCO, which is presented in this work, is more robust to pulling.
This thesis further investigates the design of frequency multipliers by using (quadrature) injection-locked-oscillators. Thanks to the high cut-off frequency of the 28nm CMOS process, the locking range is enhanced by using inverter-based pulse shaping technique to take full advantage of the rich harmonic content.
Finally, this thesis presents measurement results of complete phased array transceivers: a 28nm CMOS transceiver for the IEEE 802.11ad standard that supports up to QAM16 modulation and a PMCW 2Tx/2Rx radar with a range resolution of 7.5cm.

Short CV

Master in Electrical Engineering, KU Leuven, 2011


Date: 07.06.2017

Time: 14:00

Location: Room D.2.01 Building D

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