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Recent LAMI Conference Publications

These are LAMI's conference publications for the last three years. A non time-limited list can be found here.

Click here for this list in IEEE format.

2020

“A 12mW 10GHz FMCW PLL Based on an Integrating DAC with 90kHz rms Frequency Error for 23MHz/Ás Slope and 1.2GHz Chirp Bandwidth”, in 2020 International Solid-State Circuits Conference

“Compact time-resolved fluorescence spectrometer”, in SPIE Photonics Europe, 2020

“A 28GHz Two-Way Current Combining Stacked-FET Power Amplifier in 22nm FD-SOI”, in 2020 IEEE Custom Integrated Circuits Conference (CICC)

“A 10.56Gbit/s, -27.8dB EVM Polar Transmitter at 60GHz in 28nm CMOS”, in 2020 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)

2019

“A novel 350 nm CMOS optical receiver based on a current-assisted photodiode detector”, in SPIE Photonics West 2019

“A proof-of-concept fluorescence lifetime camera based on a novel gated image sensor for fluorescence-guided surgery”, in SPIE Photonics West 2019

“Systematic Design of On-Chip Matching Networks for D-band Circuits”, in 2019 17th IEEE International New Circuits and Systems Conference (NEWCAS)

“Design of A D-band Transformer-Based Neutralized Class-AB Power Ampli?er in Silicon Technologies”, in 2019 17th IEEE International New Circuits and Systems Conference (NEWCAS)

“A 22.5-27.7-GHz Fast-Lock Bang-Bang Digital PLL in 28-nm CMOS for Millimeter-Wave Communication with 220-fs RMS Jitter”, in 45th IEEE European Solid State Circuits Conference, ESSCIRC 2019

“A 112-142GHz Power Amplifier with Regenerative Reactive Feedback achieving 17dBm peak Psat at 13% PAE”, in ESSCIRC 2019 - IEEE 45th European Solid State Circuits Conference

“Design of a 28 GHz differential GaAs power amplifier with capacitive neutralization for 5G mmwave applications”, in 17th IEEE International New Circuits and Systems Conference, NEWCAS 2019

“Device-, Circuit-Block-level evaluation of CFET in a 4 track library”, in 39th Symposium on VLSI Technology, VLSI Technology 2019

“Buried metal line compatible with 3D sequential integration for top tier planar devices dynamic Vth tuning and RF shielding applications”, in 39th Symposium on VLSI Technology, VLSI Technology 2019

“Key challenges and opportunities for 3D sequential integration”, in 2018 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, S3S 2018

“First Demonstration of 3D stacked Finfets at a 45nm fin pitch and 110nm gate pitch technology on 300mm wafers”, in 64th Annual IEEE International Electron Devices Meeting, IEDM 2018

“A 5ps resolution, 8.6ns delay range digital delay line using combinatorial redundancy”, in 15th Conference on PhD Research in Microelectronics and Electronics

2018

“Semiconductor Technologies for next Generation Mobile Communications”, in 14th IEEE International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2018

“Scaling CMOS beyond Si FinFET: An analog/RF perspective”, in 48th European Solid-State Device Research Conference, ESSDERC 2018

“An in-depth study of high-performing strained germanium nanowires pFETs”, in 38th IEEE Symposium on VLSI Technology, VLSI Technology 2018

“A 5.5 GHz Background-Calibrated Subsampling Polar Transmitter with -41.3 DB EVM at 1024 OAM in 28NM CMOS”, in 2018 Symposia on VLSI Technology and Circuits

“Exploring Side Information for DVB-t-based Passive Radars”, in URSI Benelux Forum 2018

“Online Sequential Compressed Sensing with Weighted Multiple Side Information for Through the Wall Imaging”, in URSI Benelux Forum 2018

“Power aware FinFET and lateral nanosheet FET targeting for 3nm CMOS technology”, in 63rd IEEE International Electron Devices Meeting, IEDM 2017

“The impact of sequential-3D integration on semiconductor scaling roadmap”, in 63rd IEEE International Electron Devices Meeting, IEDM 2017

“The combined use of millimetre wave imaging and acoustic emission for the damage investigation of glass fibre reinforced polymer composites”, in 12th European Conference on Non-Destructive Testing

“Water diffusion mapping in organic coatings on metal substrates: A quasi-optical mm-wave technique Vs. Odd Random Phase Electrochemical Impedance Spectroscopy”, in EUROCORR

“Localizing defect by means of Transient Radar Method(TRM) in 3D scanners 8th International Workshop on THz Technology and Applications”, in Transient Radar Method(TRM): Novel Illumination and Blind Electromagnetic/Geometrical Parameter Extraction Technique for Multilayer Structures

“3D technologies for analog/RF applications”, in 2017 IEEE SOI-3D-Subthreshold Microelectronics Unified Conference, S3S 2017

“Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling”, in 2018 International Conference on IC Design and Technology, ICICDT 2018

“Cost Effective FinFET Platform for Stand Alone DRAM 1Y and beyond Memory Periphery”, in 10th IEEE International Memory Workshop, IMW 2018

“A 28-GHz Transceiver Front-End with T/R Switching Achieving 11.2-dBm OP1dB, 33.8% PAEmax and 4-dB NF in 22-nm FD-SOI for 5G Communication”, in SOI-3D-Subthreshold Microelectronics Unified Conference

“PD-SOI: Enabling Adaptive RF Front-End Modules”, in SOI-3D-Subthreshold Microelectronics Unified Conference

“A 23 GHz Low-Phase-Noise Transformer-Feedback VCO in 22nm FD-SOI with a FOMT of 191dBc/Hz”, in IEEE SOI-3D-SUBTHRESHOLD MICROELECTRONICS TECHNOLOGY UNIFIED CONFERENCE

“A 23 GHz Low-Phase-Noise Transformer-Feedback VCO in 22nm FD-SOI with a FOMT of 191dBc/Hz”, in A 23 GHz Low-Phase-Noise Transformer-Feedback VCO in 22nm FD-SOI with a FOMT of 191dBc/Hz

“Trap-Aware Compact Modeling and Power-Performance Assessment of III-V Tunnel FET”, in Trap-Aware Compact Modeling and Power-Performance Assessment of III-V Tunnel FET

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