Understanding the impact of time-dependent random variability on analog ICs: From single transistor measurements to circuit simulations
This publication appears in: IEEE Transactions on very large scale integration (VLSI) Systems
Authors: M. Simicic, P. Weckx, B. Parvais, P. Roussel, B. Kaczer and G. Gielen
Publication Date: Mar. 2019
Advanced scaling and the introduction of new materials in the metal-oxide-semiconductor field-effect transistor (MOSFET) raise concerns about its reliability. Several degradation mechanisms, depending on operating conditions and time, can cause a significant change of the transistor parameters. The transistor area plays a large role when it comes to aging. In large-area MOSFETs, aging appears deterministic, while in small-area devices it is stochastic and convoluted with random telegraph noise. This is analogous to the time-zero random variability, which also reduces as the transistor gate area increases. The scope of this paper is to extend the knowledge of the time-dependent random variability as a function of MOSFET gate area scaling. The goal is to aid the designers in transistor sizing toward a more reliable design. As an example, the impact of time-dependent random variability is illustrated for an analog-to-digital converter.