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Conference Publication

Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling

Host Publication: 2018 International Conference on IC Design and Technology, ICICDT 2018

Authors: B. Parvais, E. Rosseel, L. Peng, L. Teugels, A. Vandooren, J. Franco, A. Mallik, A. Walke, V. Deshpande, A. Hikavyy, N. Rassoul, G. Jamieson, F. Inoue, G. Verbinnen, E. Vecchio, T. Zheng, N. Waldron, V. De Heyn, D. Mocuta and N. Collaert

Publisher: Institute of Electrical and Electronics Engineers Inc

Publication Date: Jun. 2018

Number of Pages: 4


Abstract:

In this paper, we review the current progress on 3D sequential device stacking, highlighting the main integration challenges and the possible technological solutions. Next, we explore the potential benefits of 3D sequential stacking at transistor level, CMOS level and for hybrid circuits.

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