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Cryo electronics for quantum computing ■

States of quantum bits can be easily distorted by thermal noise and any electromagnetic interference, and it must be ensured that qubit states stay intact within a quantum operation to achieve a reliable computation using some quantum properties. The common method to reduce the distortion is to cool the qubits down to sub-1 K (~10mK). Despite being at this extremely low temperatures, the lowest error rates per computational step have been achieved are on the order of 0.1%. Performing error-free computations necessitates the implementation of quantum error correction (QEC) codes which will require approximately a million qubits. Therefore, using interconnects from room temperature down to the quantum processor will not be practical anymore. To be able to realize such large-scale quantum computers, quantum computer should have a compact structure together with quantum control and measurement systems.

In this context, it has been recently proposed that control and readout circuits of quantum bits can be placed in the 4-K stage of the dilution refrigerator, which has enough cooling power for the devices dissipating watts of power. However, average power consumption per qubit in such system requires to be less than 1 mW. This is a significant challenge for designing cryogenic circuit design for quantum computing. Another major challenge is the lack of commercial device models for these very low temperatures.

In this research, we intend to research this exciting new and broad field of cryo electronics for quantum computing. It is an interdisciplinary topic, closely interacting with the development of new physical qubit structures. The fundamental physics, as well as the details of the materials used and the processing steps devised for the realization of a qubit heavily impact the qubit performance, and the requirements on the electronics used to drive and read them. It is far from straightforward to conceive the architecture of the electronics to be integrated close to the qubits. There are severe constraints due to the low-temperature operation. To limit the amount of cable connection in the dilution refrigerator, ideally one would integrate signal generators and readout electronics as close as possible to the qubits. However, cooling power of typical fridges in their base at 10-20mK temperatures is only a few 10s of µW. Any power dissipated at this position will increase the base temperature and will degrade the qubit performance. Therefore, it will be more probable to use electronics at 4K, where more cooling power is available. Transistor characteristics at these temperatures are often not known and will have to be modelled. With these models, the required trade-off between circuit performance (and the qubit performance impacted by that) and power consumption can be done. To reduce the number of cables required between the qubits at 10mK and the electronics at 4K should definitively be minimized. Multiplexing schemes to transfer signals from several qubits onto a shared cable must be an integral part of the quantum computer electronics architecture. Some critical circuit blocks will be implemented, to verify the assumptions taken in the architecture study. Main circuit blocks will be designed are quadrature VCO, ADC, and LNA.