The main objective of this project is to perform fundamental research on the possibilities for reconfigurability and scalability of multimedia applications and content, as well as of the underlying terminal hardware. In the end, this fundamental research should result in the proposal of an optimal reconfigurable hardware platform (embedded system) running multimedia applications (e.g., video presentations) that also are adaptable.

For the specification of the reconfigurable hardware we will study the hardware performance requirements, defined by the multimedia (mainly video supported) applications. We will investigate the degree of hardware reconfigurability needed and also evaluate the benefits of reconfigurability against the possible deterioration of the global performance (speed, power, etc.). We will also attack the problem of the interface with other parts of a classical embedded system, in particular with the processor that is present. Not only should this processor run some (parts of) applications in software, it will also be responsible for the scheduling of tasks between hardware and software and for the FPGA reconfiguration. To maximize the benefits of the reconfigurable hardware platform we will study scalable video codecs (DCT-based and wavelet-based) and define a negotiation protocol between the corresponding video servers and the terminals on which videos are shown to the end users. The video coding will therefore be parameterized, guaranteeing the scalability.

Runtime: 2003 - 2006