Chiarella, T., Parvais, B., Horiguchi, N., Togo, M., Kerner, C., Witters, L., Absil, P., Biesemans, S., & Hoffmann, T. (2011). Simple current and capacitance methods for bulk finFET height extraction and correlation to device variability. In 2011 IEEE International Conference on Microelectronic Test Structures - 24th ICMTS Conference Proceedings (pp. 158-161). Article 5976879 (IEEE International Conference on Microelectronic Test Structures). https://doi.org/10.1109/ICMTS.2011.5976879

@inproceedings{4952d66e97e447ee9099e5e28c8ce64d,
title = "Simple current and capacitance methods for bulk finFET height extraction and correlation to device variability",
abstract = "FinFET devices are expected to be appropriate candidates for further scaling down logic devices while maintaining short-channel effects under control [1] [2] [3]. In this work, two different characterization methods are used to evaluate the impact of device characteristic dimensions such as the fin height and width on variability and performance. Both techniques can accurately predict the physical dimensions but the current-based method was shown to be more in line with the actual physical profiles. The results have been validated by cross-sectional transmission electron microscopy (TEM), confirming the within wafer variations.",
author = "T. Chiarella and B. Parvais and N. Horiguchi and M. Togo and C. Kerner and L. Witters and P. Absil and S. Biesemans and T. Hoffmann",
year = "2011",
month = sep,
day = "9",
doi = "10.1109/ICMTS.2011.5976879",
language = "English",
isbn = "9781424485277",
series = "IEEE International Conference on Microelectronic Test Structures",
pages = "158--161",
booktitle = "2011 IEEE International Conference on Microelectronic Test Structures - 24th ICMTS Conference Proceedings",
note = "2011 24th IEEE International Conference on Microelectronic Test Structures, ICMTS 2011 ; Conference date: 04-04-2011 Through 07-04-2011",
}