Despite their excellent control of short channel effects, FinFETs suffer from different trade-offs in the mixed-signal domain, with respect to planar devices. For the first time, we report a complete and comprehensive comparative analysis showing that these trade-offs can be alleviated in advanced FinFET technology. As such, higher voltage gain and transconductance than planar MOSFETs are reached at the same time. VT mismatch smaller than 3mV.μm is obtained for narrow (10nm) fins. Reduced speed sensitivity to gate pitch scaling and invertor delay reduced below 10 ps will be demonstrated.
Parvais, B, Mercha, A, Collaert, N, Rooyackers, R, Ferain, I, Jurczak, M, Subramanian, V, De Keersgieter, A, Chiarella, T, Kerner, C, Witters, L, Biesemans, S & Hoffman, T 2009, The device architecture dilemma for CMOS technologies: Opportunities & challenges of FinFet over planar MOSFET. in 2009 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA '09., 5159300, International Symposium on VLSI Technology, Systems, and Applications, Proceedings, pp. 80-81, 2009 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA '09, Hsinchu, Taiwan, Province of China, 27/04/09. https://doi.org/10.1109/VTSA.2009.5159300
Parvais, B., Mercha, A., Collaert, N., Rooyackers, R., Ferain, I., Jurczak, M., Subramanian, V., De Keersgieter, A., Chiarella, T., Kerner, C., Witters, L., Biesemans, S., & Hoffman, T. (2009). The device architecture dilemma for CMOS technologies: Opportunities & challenges of FinFet over planar MOSFET. In 2009 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA '09 (pp. 80-81). Article 5159300 (International Symposium on VLSI Technology, Systems, and Applications, Proceedings). https://doi.org/10.1109/VTSA.2009.5159300
@inproceedings{8a14f471bb404ecf97afe9e17241ffb5,
title = "The device architecture dilemma for CMOS technologies: Opportunities & challenges of FinFet over planar MOSFET",
abstract = "Despite their excellent control of short channel effects, FinFETs suffer from different trade-offs in the mixed-signal domain, with respect to planar devices. For the first time, we report a complete and comprehensive comparative analysis showing that these trade-offs can be alleviated in advanced FinFET technology. As such, higher voltage gain and transconductance than planar MOSFETs are reached at the same time. VT mismatch smaller than 3mV.μm is obtained for narrow (10nm) fins. Reduced speed sensitivity to gate pitch scaling and invertor delay reduced below 10 ps will be demonstrated.",
author = "B. Parvais and A. Mercha and N. Collaert and R. Rooyackers and I. Ferain and M. Jurczak and V. Subramanian and {De Keersgieter}, A. and T. Chiarella and C. Kerner and L. Witters and S. Biesemans and T. Hoffman",
year = "2009",
month = dec,
day = "1",
doi = "10.1109/VTSA.2009.5159300",
language = "English",
isbn = "9781424427857",
series = "International Symposium on VLSI Technology, Systems, and Applications, Proceedings",
pages = "80--81",
booktitle = "2009 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA '09",
note = "2009 International Symposium on VLSI Technology, Systems, and Applications, VLSI-TSA '09 ; Conference date: 27-04-2009 Through 29-04-2009",
}