Scaling to 45 nm node and below might necessitate the use of new processing steps (e.g. new gate stacks) or new device concepts such as FinFETs. Although intrinsic transistor speed increases with scaling, some analog performance parameters tend to degrade. In this paper we show with experimental results and simulations on analog and RF circuits that for high-speed and RF applications, downscaling to 45 nm channel length of bulk devices still improves RF circuit performance, while for low-frequency, high-gain applications FinFET technology offers better circuit performance than planar bulk CMOS.
Wambacq, P, Verbruggen, B, Scheie, K, Borremans, J, De Heyn, V, Van Der Plas, G, Mercha, A, Parvais, B, Subramanian, V, Jurczak, M, Decoutere, S & Donnay, S 2006, Analog and RF circuits in 45 nm CMOS and below: Planar bulk versus FinFET. in ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference., 4099854, ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference, IEEE Computer Society, pp. 53-56, ESSDERC 2006 - 36th European Solid-State Device Research Conference, Montreux, Switzerland, 19/09/06. https://doi.org/10.1109/ESSDER.2006.307636
Wambacq, P., Verbruggen, B., Scheie, K., Borremans, J., De Heyn, V., Van Der Plas, G., Mercha, A., Parvais, B., Subramanian, V., Jurczak, M., Decoutere, S., & Donnay, S. (2006). Analog and RF circuits in 45 nm CMOS and below: Planar bulk versus FinFET. In ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference (pp. 53-56). Article 4099854 (ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference). IEEE Computer Society. https://doi.org/10.1109/ESSDER.2006.307636
@inproceedings{4e3aba7d53e2444c999a971161cb8896,
title = "Analog and RF circuits in 45 nm CMOS and below: Planar bulk versus FinFET",
abstract = "Scaling to 45 nm node and below might necessitate the use of new processing steps (e.g. new gate stacks) or new device concepts such as FinFETs. Although intrinsic transistor speed increases with scaling, some analog performance parameters tend to degrade. In this paper we show with experimental results and simulations on analog and RF circuits that for high-speed and RF applications, downscaling to 45 nm channel length of bulk devices still improves RF circuit performance, while for low-frequency, high-gain applications FinFET technology offers better circuit performance than planar bulk CMOS.",
author = "Piet Wambacq and Bob Verbruggen and Karen Scheie and Jonathan Borremans and {De Heyn}, Vincent and {Van Der Plas}, Geert and Abdelkarim Mercha and Bertrand Parvais and Vaidy Subramanian and Malgorzata Jurczak and Stefaan Decoutere and St{\'e}phane Donnay",
year = "2006",
month = jan,
day = "1",
doi = "10.1109/ESSDER.2006.307636",
language = "English",
isbn = "1424403014",
series = "ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference",
publisher = "IEEE Computer Society",
pages = "53--56",
booktitle = "ESSDERC 2006 - Proceedings of the 36th European Solid-State Device Research Conference",
address = "United States",
note = "ESSDERC 2006 - 36th European Solid-State Device Research Conference ; Conference date: 19-09-2006 Through 21-09-2006",
}