Publication Details
Cor Claeys, Geert Hellings, Hiroaki Arimura, Bertrand Parvais, Lars Ake Ragnarsson, Harold Dekkers, Tom Schram, Dimitri Linten, Naoto Horiguchi, Eddy Simoen, E. Simoen, Dimitri Boudier, Bogdan Cretu

2020 IEEE 15th International Conference on Solid-State and Integrated Circuit Technology, ICSICT 2020 - Proceedings

Contribution To Book Anthology


The low-frequency noise of input-output (I/O) FinFETs with 3.5 nm and 5nm SiO2 gate dielectric is studied for different processing conditions. For the thin dielectric a high-pressure (HP) deuterium anneal can improve the noise Power Spectral Density (PSD). There is no significant impact on n-channel devices, while a pronounced effect is observed for p-channel devices, especially for a HP anneal at 400 °C and 20 atm. Results are also presented on the use of a Si/SiGe superlattice architecture and it is shown that the same gate stack quality as for standard devices can be maintained.

DOI scopus