We present a subsampling polar transmitter (SSPTX) in 28nm CMOS that consists of a low-noise phase modulating (PM) digital subsampling PLL and a harmonic rejection mixed (HRM) inverse-class-D (D- 1 ) digital power amplifier (DPA) for amplitude modulation (AM). The DPA is, unlike in a typical polar TX, placed within the PLL and the phase-error detection happens directly at the DPA output. The subsampling polar TX thus becomes sensitive not only to phase-errors, but also to modulation amplitude. That feature enables AM distortion to be detected and canceled digitally in the background while the transmitter operates normally. The chip operates from a 0.9V supply at 5.5GHz with 2.5MHz BW and 1024 QAM, consuming on average 46mW.
Markulic, N, Renukaswamy, P, Martens, E, van Liempd, B, Wambacq, P & Craninckx, J 2018, A 5.5 GHz Background-Calibrated Subsampling Polar Transmitter with −41.3 DB EVM at 1024 OAM in 28NM CMOS. in A 5.5 GHz Background-Calibrated Subsampling Polar Transmitter with −41.3 DB EVM at 1024 OAM in 28NM CMOS. 2018 IEEE Symposium on VLSI Circuits, Honolulu, HI, USA, pp. 215-216, 2018 Symposia on VLSI Technology and Circuits, Honolulu, United States, 18/06/18. https://doi.org/10.1109/VLSIC.2018.8502326
Markulic, N., Renukaswamy, P., Martens, E., van Liempd, B., Wambacq, P., & Craninckx, J. (2018). A 5.5 GHz Background-Calibrated Subsampling Polar Transmitter with −41.3 DB EVM at 1024 OAM in 28NM CMOS. In A 5.5 GHz Background-Calibrated Subsampling Polar Transmitter with −41.3 DB EVM at 1024 OAM in 28NM CMOS (pp. 215-216). 2018 IEEE Symposium on VLSI Circuits. https://doi.org/10.1109/VLSIC.2018.8502326
@inproceedings{13e546c477574b09bdb308034dcd6ac9,
title = "A 5.5 GHz Background-Calibrated Subsampling Polar Transmitter with −41.3 DB EVM at 1024 OAM in 28NM CMOS",
abstract = "We present a subsampling polar transmitter (SSPTX) in 28nm CMOS that consists of a low-noise phase modulating (PM) digital subsampling PLL and a harmonic rejection mixed (HRM) inverse-class-D (D- 1 ) digital power amplifier (DPA) for amplitude modulation (AM). The DPA is, unlike in a typical polar TX, placed within the PLL and the phase-error detection happens directly at the DPA output. The subsampling polar TX thus becomes sensitive not only to phase-errors, but also to modulation amplitude. That feature enables AM distortion to be detected and canceled digitally in the background while the transmitter operates normally. The chip operates from a 0.9V supply at 5.5GHz with 2.5MHz BW and 1024 QAM, consuming on average 46mW.",
author = "Nereo Markulic and Pratap Renukaswamy and Ewout Martens and {van Liempd}, Barend and Piet Wambacq and Jan Craninckx",
year = "2018",
month = oct,
day = "25",
doi = "10.1109/VLSIC.2018.8502326",
language = "English",
pages = "215--216",
booktitle = "A 5.5 GHz Background-Calibrated Subsampling Polar Transmitter with −41.3 DB EVM at 1024 OAM in 28NM CMOS",
publisher = "2018 IEEE Symposium on VLSI Circuits",
note = "2018 Symposia on VLSI Technology and Circuits ; Conference date: 18-06-2018 Through 22-06-2018",
url = "https://vlsisymposium.org/2018/",
}