Hellings, G., Mertens, H., Subirats, A., Simoen, E., Schram, T., Ragnarsson, L. A., Simicic, M., Chen, S. H., Parvais, B., Boudier, D., Cretu, B., Machillot, J., Pena, V., Sun, S., Yoshida, N., Kim, N., Mocuta, A., Linten, D., & Horiguchi, N. (2018). Si/SiGe superlattice I/O finFETs in a vertically-stacked Gate-All-Around horizontal nanowire technology. In 2018 IEEE Symposium on VLSI Technology, VLSI Technology 2018 (pp. 85-86). Article 8510654 (Digest of Technical Papers - Symposium on VLSI Technology; Vol. 2018-June). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/VLSIT.2018.8510654

@inproceedings{1a8fc2f1ab2d43b4957f89e3c1fd5aa2,
title = "Si/SiGe superlattice I/O finFETs in a vertically-stacked Gate-All-Around horizontal nanowire technology",
abstract = "This work presents Si/SiGe superlattice finFETs (FF) for 1.8V/2.5V I/O applications in vertically-stacked Gate-All-Around horizontal nanowire technology (hNW) technology. Superlattice FF have a higher ION than I/O hNW reference devices and can be more easily integrated into a GAA hNW technology than Si I/O FF. These novel I/O FET structures exhibit competitive analog performance and are superior as ESD protection devices.",
author = "G. Hellings and H. Mertens and A. Subirats and E. Simoen and T. Schram and Ragnarsson, {L. A.} and M. Simicic and Chen, {S. H.} and B. Parvais and D. Boudier and B. Cretu and J. Machillot and V. Pena and S. Sun and N. Yoshida and N. Kim and A. Mocuta and D. Linten and N. Horiguchi",
year = "2018",
month = oct,
day = "25",
doi = "10.1109/VLSIT.2018.8510654",
language = "English",
series = "Digest of Technical Papers - Symposium on VLSI Technology",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "85--86",
booktitle = "2018 IEEE Symposium on VLSI Technology, VLSI Technology 2018",
address = "United States",
note = "38th IEEE Symposium on VLSI Technology, VLSI Technology 2018 ; Conference date: 18-06-2018 Through 22-06-2018",
}