This paper proposes the use of a high-power stacked output stage for a current-based in-phase/quadrature (I/Q) direct digital to RF modulator (DDRM) in bulk CMOS. The main nonlinearities associated with implementing the stacked transistor on top of the I/Q DDRM are easily compensated by a simple 2-D digital predistortion. A prototype implemented in 28-nm bulk CMOS achieves a saturated output power (P SAT ) of 25 dBm and a peak output power (P out ) of 21 dBm at 1-GHz carrier frequency ( f c ). Their corresponding efficiencies are 45% power added efficiency and 33% system efficiency (η sys ), respectively. In addition, it achieves 11.5% η sys with a -30.5-dB error vector magnitude when transmitting a 40-MHz 64 quadrature amplitude modulation wireless local area network (WLAN) signal. The WLAN signal is transmitted at 12-dBm average P out , and at 1-GHz f c with 8.73-dB peak to average power ratio (peak Pout of 20.73 dBm).
Gaber Mahdi Hussein, W, Wambacq, P, Craninckx, J & Ingels, M 2017, 'A 21-dBm I/Q Digital Transmitter Using Stacked Output Stage in 28-nm Bulk CMOS Technology', IEEE Transactions on Microwave Theory and Techniques, vol. 65, no. 11, pp. 4744-4757. https://doi.org/10.1109/TMTT.2017.2707415
Gaber Mahdi Hussein, W., Wambacq, P., Craninckx, J., & Ingels, M. (2017). A 21-dBm I/Q Digital Transmitter Using Stacked Output Stage in 28-nm Bulk CMOS Technology. IEEE Transactions on Microwave Theory and Techniques, 65(11), 4744-4757. https://doi.org/10.1109/TMTT.2017.2707415
@article{6d13d592939142418c23f1d3375caff7,
title = "A 21-dBm I/Q Digital Transmitter Using Stacked Output Stage in 28-nm Bulk CMOS Technology",
abstract = "This paper proposes the use of a high-power stacked output stage for a current-based in-phase/quadrature (I/Q) direct digital to RF modulator (DDRM) in bulk CMOS. The main nonlinearities associated with implementing the stacked transistor on top of the I/Q DDRM are easily compensated by a simple 2-D digital predistortion. A prototype implemented in 28-nm bulk CMOS achieves a saturated output power (P SAT ) of 25 dBm and a peak output power (P out ) of 21 dBm at 1-GHz carrier frequency ( f c ). Their corresponding efficiencies are 45% power added efficiency and 33% system efficiency (η sys ), respectively. In addition, it achieves 11.5% η sys with a -30.5-dB error vector magnitude when transmitting a 40-MHz 64 quadrature amplitude modulation wireless local area network (WLAN) signal. The WLAN signal is transmitted at 12-dBm average P out , and at 1-GHz f c with 8.73-dB peak to average power ratio (peak Pout of 20.73 dBm).",
author = "{Gaber Mahdi Hussein}, Wagdy and Piet Wambacq and Jan Craninckx and Mark Ingels",
year = "2017",
month = jun,
day = "9",
doi = "10.1109/TMTT.2017.2707415",
language = "English",
volume = "65",
pages = "4744--4757",
journal = "IEEE Transactions on Microwave Theory and Techniques",
issn = "0018-9480",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "11",
}