Esfeh, BK, Kilchytska, V, Parvais, B, Planes, N, Haond, M, Flandre, D & Raskin, JP 2017, Back-gate bias effect on UTBB-FDSOI non-linearity performance. in European Solid-State Device Research Conference. European Solid-State Device Research Conference, Editions Frontieres, Neuily sur Seine, France, pp. 148-151, European Solid-State Device Research Conference, 9/10/17. https://doi.org/10.1109/ESSDERC.2017.8066613
Esfeh, B. K., Kilchytska, V., Parvais, B., Planes, N., Haond, M., Flandre, D., & Raskin, J. P. (2017). Back-gate bias effect on UTBB-FDSOI non-linearity performance. In European Solid-State Device Research Conference (pp. 148-151). (European Solid-State Device Research Conference). Editions Frontieres, Neuily sur Seine, France. https://doi.org/10.1109/ESSDERC.2017.8066613
@inproceedings{b3cfd55c29334d20b91dbcb40bca9ca5,
title = "Back-gate bias effect on UTBB-FDSOI non-linearity performance",
keywords = "Fully depleted (FD) SOI, MOSFETs, harmonic distortion, measurements, non-linearity",
author = "Esfeh, {B. Kazemi} and V. Kilchytska and B. Parvais and N. Planes and M. Haond and D. Flandre and Raskin, {J. P.}",
year = "2017",
month = oct,
day = "12",
doi = "10.1109/ESSDERC.2017.8066613",
language = "English",
isbn = "9781509059782",
series = "European Solid-State Device Research Conference",
publisher = "Editions Frontieres, Neuily sur Seine, France",
pages = "148--151",
booktitle = "European Solid-State Device Research Conference",
note = " European Solid-State Device Research Conference ; Conference date: 09-10-2017 Through 12-10-2017",
}