IM3 cancellation is a popular technique in LNAs to achieve very high linearity, but is also very sensitive to the exact device (bias) operating point. A 0.7-1.15GHz complementary common-gate LNA in 0.18µm silicon-on-insulator CMOS is presented that achieves good out-of-band (OOB) linearity without IM3 cancellation. Measurements of the 0.9mm2 prototype show a gain of >7dB, an NF of <2.3dB, more than +15dBm OOB IIP3 and over 0dBm B1dB. Compared to other work, this LNA has a similar or better linearity at only 10mW. The LNA uses a nominal supply of 2.5V, but was tested up to 3.7V and showed no significant degradation of its linearity for ±400mV supply variations. A power clamp, designed to enable testing at higher core supply voltage, withstands a >2.6kV HBM discharge, while the overall circuit is protected for >1kV HBM discharges.
van Liempd, B, Ariumi, S, Martens, E, Chen, S-H, Wambacq, P & Craninckx, J 2015, A 0.7-1.15GHz Complementary Common-Gate LNA in 0.18µm SOI CMOS with +15dBm IIP3 and >1kV HBM ESD Protection. in W Pribyl, F Dielacher & G Hueber (eds), Proceedings of the 41st European Solid-State Circuits Conference. IEEE, pp. 164-167, European Solid-State Circuits Conference, Graz, Austria, 14/09/15.
van Liempd, B., Ariumi, S., Martens, E., Chen, S.-H., Wambacq, P., & Craninckx, J. (2015). A 0.7-1.15GHz Complementary Common-Gate LNA in 0.18µm SOI CMOS with +15dBm IIP3 and >1kV HBM ESD Protection. In W. Pribyl, F. Dielacher, & G. Hueber (Eds.), Proceedings of the 41st European Solid-State Circuits Conference (pp. 164-167). IEEE.
@inproceedings{5fef5bc570a34fb1a8d2a1d9e160858c,
title = "A 0.7-1.15GHz Complementary Common-Gate LNA in 0.18µm SOI CMOS with +15dBm IIP3 and >1kV HBM ESD Protection",
abstract = "IM3 cancellation is a popular technique in LNAs to achieve very high linearity, but is also very sensitive to the exact device (bias) operating point. A 0.7-1.15GHz complementary common-gate LNA in 0.18µm silicon-on-insulator CMOS is presented that achieves good out-of-band (OOB) linearity without IM3 cancellation. Measurements of the 0.9mm2 prototype show a gain of >7dB, an NF of <2.3dB, more than +15dBm OOB IIP3 and over 0dBm B1dB. Compared to other work, this LNA has a similar or better linearity at only 10mW. The LNA uses a nominal supply of 2.5V, but was tested up to 3.7V and showed no significant degradation of its linearity for ±400mV supply variations. A power clamp, designed to enable testing at higher core supply voltage, withstands a >2.6kV HBM discharge, while the overall circuit is protected for >1kV HBM discharges.",
keywords = "low-noise amplifiers, silicon-on-insulator, CMOS, nonlinear distortion, Electrostatic discharges (ESDs)",
author = "{van Liempd}, Barend and Saneaki Ariumi and Ewout Martens and Shih-Hung Chen and Piet Wambacq and Jan Craninckx",
year = "2015",
month = sep,
day = "14",
language = "English",
isbn = "978-1-4673-7470-5",
pages = "164--167",
editor = "Wolfgang Pribyl and Franz Dielacher and Gernot Hueber",
booktitle = "Proceedings of the 41st European Solid-State Circuits Conference",
publisher = "IEEE",
note = "European Solid-State Circuits Conference ; Conference date: 14-09-2015 Through 18-09-2015",
}