Björn Debaillie, Barend Van Liempd, Benjamin Hershberg, Jan Craninckx, Kari Rikkinen, Dirk-Jan van den broek, E.A.M. Klumperink, Bram Nauta
In-band full-duplex is a promising air interface technique to tackle several of the key challenges of next generation (5G) mobile networks. Simultaneous transmission and reception in the same frequency band increases the throughput and spectral efficiency, and reduces the air interface delay. Its implementation in 5G systems, however, restrains the full-duplex transceiver design requirements. Two analog integrated circuit solutions are presented and evaluated in the frame of 5G applications. The first design is a self-interference cancelling front-end implemented in 65nm CMOS, and the second design is an electrical-balance duplexer implemented in 0.18µm RF SOI CMOS. Both designs are attractive in the context of 5G; they allow dense integration, are configurable to support alternative and legacy standards, are compatible with conventional antenna(s), and they provide an attractive full-duplex performance for wireless communications.
Debaillie, B, van Liempd, B, Hershberg, B, Craninckx, J, Rikkinen, K, van den broek, D-J, Klumperink, EAM & Nauta, B 2015, In-Band Full-Duplex Transceiver Technology for 5G Mobile Networks. in Proceedings of the 41th ESSCIRC. IEEE, European Solid-State Circuits Conference, Graz, Austria, 14/09/15.
Debaillie, B., van Liempd, B., Hershberg, B., Craninckx, J., Rikkinen, K., van den broek, D.-J., Klumperink, E. A. M., & Nauta, B. (2015). In-Band Full-Duplex Transceiver Technology for 5G Mobile Networks. In Proceedings of the 41th ESSCIRC IEEE.
@inproceedings{7d2d9a2ffb87478fa31bf01debc67d6b,
title = "In-Band Full-Duplex Transceiver Technology for 5G Mobile Networks",
abstract = "In-band full-duplex is a promising air interface technique to tackle several of the key challenges of next generation (5G) mobile networks. Simultaneous transmission and reception in the same frequency band increases the throughput and spectral efficiency, and reduces the air interface delay. Its implementation in 5G systems, however, restrains the full-duplex transceiver design requirements. Two analog integrated circuit solutions are presented and evaluated in the frame of 5G applications. The first design is a self-interference cancelling front-end implemented in 65nm CMOS, and the second design is an electrical-balance duplexer implemented in 0.18µm RF SOI CMOS. Both designs are attractive in the context of 5G; they allow dense integration, are configurable to support alternative and legacy standards, are compatible with conventional antenna(s), and they provide an attractive full-duplex performance for wireless communications. ",
author = "Bj{\"o}rn Debaillie and {van Liempd}, Barend and Benjamin Hershberg and Jan Craninckx and Kari Rikkinen and {van den broek}, Dirk-Jan and E.A.M. Klumperink and Bram Nauta",
year = "2015",
month = sep,
day = "14",
language = "English",
isbn = "978-1-4673-7470-5",
booktitle = "Proceedings of the 41th ESSCIRC",
publisher = "IEEE",
note = "European Solid-State Circuits Conference ; Conference date: 14-09-2015 Through 18-09-2015",
}