Yakimets, D., Huynh Bao, T., Bardon, M. G., Dehan, M., Collaert, N., Mercha, A., Tokei, Z., Thean, A., Verkest, D., & De Meyer, K. (2014). Lateral versus vertical gate-all-around FETs for beyond 7nm technologies. In Device Research Conference (DRC), 2014 72nd Annual (pp. 133-134). IEEE. https://doi.org/10.1109/DRC.2014.6872333

@inproceedings{cbe097713b0f4ab695677aac835fd46d,
title = "Lateral versus vertical gate-all-around FETs for beyond 7nm technologies",
abstract = "Nominal LG VFET-based RO may operate up to ~60% faster than LFET-based RO at the same energy per switch for both 7nm and 5nm technology nodes depending on the layout and BEOL-load. With VFETs, relaxing the LG is possible and it results in an extra 27% in IEFF in comparison to the nominal LG case. In addition, VFETs enable different layouts, which can be used to optimize performance under certain BEOL-load. Introduction of VFETs is more favorable at the 5nm node than at the 7nm node. As such, VFETs show a performance competitive path for continued scaling beyond 7nm technologies.",
keywords = "vertical gate-all-around FETs, 7nm, CMOS scaling, Semiconductor process modeling",
author = "Dmitry Yakimets and {Huynh Bao}, T and Bardon, {M Garcia} and Morin Dehan and Nadine Collaert and Abdelkarim Mercha and Zsolt Tokei and Aaron Thean and Diederik Verkest and {De Meyer}, Kristin",
year = "2014",
month = jun,
day = "22",
doi = "10.1109/DRC.2014.6872333",
language = "English",
isbn = "978-1-4799-5405-6",
pages = "133--134",
booktitle = "Device Research Conference (DRC), 2014 72nd Annual",
publisher = "IEEE",
note = "72nd Device Research Conference (DRC 2014) ; Conference date: 22-06-2014 Through 25-06-2014",
}