In this manuscript, we have explored how the use of DSP blocks in the implementation of two authenticated-encryption modes of AES can optimize the PAR figures. Our results reflect that a 20.98 % reduction in slice utilization can be achieved at a throughput higher than 25 Mbps (12 MHz) in the Artix-7 XC7A200TL FPGA.
De La Piedra Abenojar, A, Braeken, A & Touhafi, A 2013, Compact implementation of CCM and GCM modes of AES using DSP blocks. in FPL 2013. IEEE, pp. 1-4, 2013 23rd International Conference on Field programmable Logic and Applications, Porto, Portugal, 2/09/13.
De La Piedra Abenojar, A., Braeken, A., & Touhafi, A. (2013). Compact implementation of CCM and GCM modes of AES using DSP blocks. In FPL 2013 (pp. 1-4). IEEE.
@inproceedings{abba7aae1def41a2bb718779385f54ba,
title = "Compact implementation of CCM and GCM modes of AES using DSP blocks",
abstract = "In this manuscript, we have explored how the use of DSP blocks in the implementation of two authenticated-encryption modes of AES can optimize the PAR figures. Our results reflect that a 20.98 % reduction in slice utilization can be achieved at a throughput higher than 25 Mbps (12 MHz) in the Artix-7 XC7A200TL FPGA.",
keywords = "FPGA, AES, crytpography",
author = "{De La Piedra Abenojar}, Antonio and An Braeken and Abdellah Touhafi",
year = "2013",
month = sep,
day = "1",
language = "English",
pages = "1--4",
booktitle = "FPL 2013",
publisher = "IEEE",
note = "2013 23rd International Conference on Field programmable Logic and Applications ; Conference date: 02-09-2013 Through 04-09-2013",
}