Geis, A., Ryckaert, J., Bos, L., Vandersteen, G., Rolain, Y., & Craninckx, J. (2010). A 0.5mm2 power scalable 0.5-3.8 GHz CMOS DT-SDR receiver with 2nd order RF band-pass sampler. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 45(11), 2375-2387.

@article{d8f6becbea9a467ebd5311278246b94d,
title = "A 0.5mm2 power scalable 0.5-3.8 GHz CMOS DT-SDR receiver with 2nd order RF band-pass sampler",
abstract = "A highly flexible receiver chain based on RF-sampling and discrete-time signal processing in the charge domain for SDR applications is presented. A compact switched-inductor variable-gain front-end provides multiband low noise amplification and RF-selectivity with reduced area penalties. Strong selectivity at RF was obtained through a novel discrete-time decimating bandpass filter with triangular weighted filter taps. Decimation filters with programmable number of taps offer flexible rate decimation. A power scalable discrete-time baseband filter was implemented in-order to minimize static power consumption. The 90-nm digital CMOS implementation achieves a noise figure of 5.1 dB, a variable gain range of more than 60 dB with approx. 1 dBm IIP3 and 50 dBm IIP2. This is achieved for power figures competitive with dedicated solutions. The receiver, frequency synthesizer excluded, occupies only 0.5 mm",
keywords = "Band-pass sampling, discrete-time signal processing, multiband receiver, programmable charge domain filter, RF-sampling, software-defined radio (SDR), switched inductor, switched OPAMP",
author = "Arnd Geis and Julien Ryckaert and Lynn Bos and Gerd Vandersteen and Yves Rolain and Jan Craninckx",
year = "2010",
month = nov,
day = "1",
language = "English",
volume = "45",
pages = "2375--2387",
journal = "IEEE JOURNAL OF SOLID-STATE CIRCUITS",
issn = "0018-9200",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "11",
}