The commercial potential of the 60 GHz band, in combintation with the scaling of CMOS, has resulted in a lot of plain digital CMOS circuits and systems for millimeter-wave application. This work presents a 90 nm digital CMOS two-path 52 GHz phased-array receiver, based on LO phase shifting. The system uses unmatched cascading of RF building blocks and features gain selection. A QVCO with a wide tuning range of 8 GHz is demonstrated. The receiver achieves 30 dB of maximum gain and 7.1 dB of minimum noise figure per path around 52 GHz for a low area and power consumption of respectively 0.1 mm2 and 65mW. The presented reciever targets 60 GHz communication where beamforming is required.
Scheir, K, Bronckers, S, Borremans, J, Wambacq, P & Rolain, Y 2008, 'A 52 GHz Phased-Array Receiver Front-End in 90nm Digital CMOS', IEEE Journal of Solid-State Circuits, December 2008, vol. 43, pp. 2651-2659.
Scheir, K., Bronckers, S., Borremans, J., Wambacq, P., & Rolain, Y. (2008). A 52 GHz Phased-Array Receiver Front-End in 90nm Digital CMOS. IEEE Journal of Solid-State Circuits, December 2008, 43, 2651-2659.
@article{1145cadf26f2471699e67b7c596ce2cc,
title = "A 52 GHz Phased-Array Receiver Front-End in 90nm Digital CMOS",
abstract = "The commercial potential of the 60 GHz band, in combintation with the scaling of CMOS, has resulted in a lot of plain digital CMOS circuits and systems for millimeter-wave application. This work presents a 90 nm digital CMOS two-path 52 GHz phased-array receiver, based on LO phase shifting. The system uses unmatched cascading of RF building blocks and features gain selection. A QVCO with a wide tuning range of 8 GHz is demonstrated. The receiver achieves 30 dB of maximum gain and 7.1 dB of minimum noise figure per path around 52 GHz for a low area and power consumption of respectively 0.1 mm2 and 65mW. The presented reciever targets 60 GHz communication where beamforming is required.",
keywords = "60GHz, calibration, CMOS, mm-wave, phased-array, QVCO, tuning range, variable gain",
author = "Karen Scheir and Stephane Bronckers and Jonathan Borremans and Piet Wambacq and Yves Rolain",
year = "2008",
month = dec,
day = "1",
language = "English",
volume = "43",
pages = "2651--2659",
journal = "IEEE Journal of Solid-State Circuits, December 2008",
issn = "0018-9200",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
}