This article presents a 55-63-GHz fundamental multicore voltage-controlled oscillator (VCO) in a 28-nm bulk CMOS process. The single-core VCO utilizes stacking and magnetic coupling of two NMOS-based resonators, which increases the tank energy for phase noise reduction while maintaining low voltage swings for reliability. In the multi-core configuration, the oscillators are coupled in a way that also simplifies LO distribution toward the transmitter and receiver. The potential parasitic modes that occur both in single-core and multi-core configurations are suppressed by design. The implicit common-mode (CM) impedance control is utilized to reduce phase noise without any large extra tail inductor as used in a conventional complementary oscillator. The distributed nature of energy restoring elements in the proposed stacked oscillator also offers robust parasitic mode suppression compared to alternative implementation based on a conventional complementary oscillator. The working range of the prototype is between 55 and 63 GHz corresponding to a tuning range of 13.4% with power consumption varying from 15.3 to 12 mW across the tuning range. The prototype achieves the best phase noise of -95 and -121.7 dBc/Hz at 1- and 10-MHz offsets from the carrier at 55GHz. The corresponding peak figure of merits (FOMs) achieved are 178 and 185 dBc/Hz at 1- and 10-MHz offsets from the carrier.
Balamurali, S, Mangraviti, G, Tsai, C-H, Wambacq, P & Craninckx, J 2022, 'Design and Analysis of 55-63-GHz Fundamental Quad-Core VCO With NMOS-Only Stacked Oscillator in 28-nm CMOS', IEEE Journal of Solid State Circuits, vol. 57, no. 7, pp. 1997-2010. https://doi.org/10.1109/JSSC.2022.3165654
Balamurali, S., Mangraviti, G., Tsai, C.-H., Wambacq, P., & Craninckx, J. (2022). Design and Analysis of 55-63-GHz Fundamental Quad-Core VCO With NMOS-Only Stacked Oscillator in 28-nm CMOS. IEEE Journal of Solid State Circuits, 57(7), 1997-2010. https://doi.org/10.1109/JSSC.2022.3165654
@article{aa8e1ebf0097483ab2b6800ceed057b4,
title = "Design and Analysis of 55-63-GHz Fundamental Quad-Core VCO With NMOS-Only Stacked Oscillator in 28-nm CMOS",
abstract = "This article presents a 55-63-GHz fundamental multicore voltage-controlled oscillator (VCO) in a 28-nm bulk CMOS process. The single-core VCO utilizes stacking and magnetic coupling of two NMOS-based resonators, which increases the tank energy for phase noise reduction while maintaining low voltage swings for reliability. In the multi-core configuration, the oscillators are coupled in a way that also simplifies LO distribution toward the transmitter and receiver. The potential parasitic modes that occur both in single-core and multi-core configurations are suppressed by design. The implicit common-mode (CM) impedance control is utilized to reduce phase noise without any large extra tail inductor as used in a conventional complementary oscillator. The distributed nature of energy restoring elements in the proposed stacked oscillator also offers robust parasitic mode suppression compared to alternative implementation based on a conventional complementary oscillator. The working range of the prototype is between 55 and 63 GHz corresponding to a tuning range of 13.4% with power consumption varying from 15.3 to 12 mW across the tuning range. The prototype achieves the best phase noise of -95 and -121.7 dBc/Hz at 1- and 10-MHz offsets from the carrier at 55GHz. The corresponding peak figure of merits (FOMs) achieved are 178 and 185 dBc/Hz at 1- and 10-MHz offsets from the carrier.",
author = "Sriram Balamurali and Giovanni Mangraviti and Cheng-Hsueh Tsai and Piet Wambacq and Jan Craninckx",
year = "2022",
month = jul,
doi = "10.1109/JSSC.2022.3165654",
language = "English",
volume = "57",
pages = "1997--2010",
journal = "IEEE Journal of Solid State Circuits",
issn = "0018-9200",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "7",
}