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Abhitosh Vais, Abhitosh Vais, Annie Kumar, Annie Kumar, Guillaume Boccardi, Guillaume Boccardi, Sachin Yadav, Sachin Yadav, Yves Mols, Yves Mols, Reynald Alcotte, Reynald Alcotte, Bjorn Vermeersch, Bjorn Vermeersch, Marc Ingels, Marc Ingels, Uthayasankaran Peralagu, Uthayasankaran Peralagu, Cesar Roda Neve, Cesar Roda Neve, Bruno Ghyselen, Bruno Ghyselen, Bertrand Parvais, Bertrand Parvais, Piet Wambacq, Piet Wambacq, Bernardette Kunert, Bernardette Kunert, Nadine Collaert, Nadine Collaert
 

Chapter in Book/ Report/ Conference proceeding

Abstract ■

III-V semiconductor-based devices, in particular InP heterojunction bipolar transistors, are a strong contender for next-generation high-speed communication systems. In this paper, we present motivation for the upscaling of III-V technology on to 300 mm Si platforms. A comparison of various options for such III-V on Si technology is described. The challenges in the way to achieve its integration into existing CMOS platform and possibilities to overcome them are shown. We describe imec's path to demonstrate a CMOS compatible III-V-on-300 mm Si technology with the most recent results.

Reference ■