Millions of qubits need to be employed in a quantum computer to achieve a fault-tolerant quantum operation. To reduce the complexity in such a large-scale system, the control and readout circuitries have been proposed to be placed at the 4 K stage of dilution refrigerators [1]. CMOS technology is commonly used to leverage its scaling to enable large integration of control and readout circuitries with qubits. However, the high-fidelity readout operations require low noise amplifiers (LNAs) with a noise temperature of a few Kelvins. This necessitates the usage of HEMT and parametric amplifiers [2]. Recently reported CMOS LNAs are still far away from attaining such good performance [3-5]. Thus, this is one of the greatest challenges on the way to the fully integrated CMOS readout. Additionally, due to the limited cooling power of dilution refrigerators, low-power solutions are needed for achieving a very good noise performance at 4 K. This paper presents a 28 nm CMOS LNA for qubit readout, which achieves an order of magnitude power reduction compared to its CMOS counterparts while still providing a similar good noise Figure (NF) performance at 4 K.
Çaglar, A, Van Winckel, S, Brebels, S, Wambacq, P & Craninckx, J 2021, A 4.2mW 4K 6-8GHz CMOS LNA for Superconducting Qubit Readout. in Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC) 2021. Proceedings - A-SSCC 2021: IEEE Asian Solid-State Circuits Conference, IEEE, pp. 1-3, Asian Solid-State Circuit Conference 2021, 7/11/21. https://doi.org/10.1109/A-SSCC53895.2021.9634832
Çaglar, A., Van Winckel, S., Brebels, S., Wambacq, P., & Craninckx, J. (2021). A 4.2mW 4K 6-8GHz CMOS LNA for Superconducting Qubit Readout. In Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC) 2021 (pp. 1-3). (Proceedings - A-SSCC 2021: IEEE Asian Solid-State Circuits Conference). IEEE. https://doi.org/10.1109/A-SSCC53895.2021.9634832
@inproceedings{c045c0107b744630bfafb3435c496932,
title = "A 4.2mW 4K 6-8GHz CMOS LNA for Superconducting Qubit Readout",
abstract = "Millions of qubits need to be employed in a quantum computer to achieve a fault-tolerant quantum operation. To reduce the complexity in such a large-scale system, the control and readout circuitries have been proposed to be placed at the 4 K stage of dilution refrigerators [1]. CMOS technology is commonly used to leverage its scaling to enable large integration of control and readout circuitries with qubits. However, the high-fidelity readout operations require low noise amplifiers (LNAs) with a noise temperature of a few Kelvins. This necessitates the usage of HEMT and parametric amplifiers [2]. Recently reported CMOS LNAs are still far away from attaining such good performance [3-5]. Thus, this is one of the greatest challenges on the way to the fully integrated CMOS readout. Additionally, due to the limited cooling power of dilution refrigerators, low-power solutions are needed for achieving a very good noise performance at 4 K. This paper presents a 28 nm CMOS LNA for qubit readout, which achieves an order of magnitude power reduction compared to its CMOS counterparts while still providing a similar good noise Figure (NF) performance at 4 K. ",
author = "Alican {\c C}aglar and {Van Winckel}, Steven and Steven Brebels and Piet Wambacq and Jan Craninckx",
year = "2021",
doi = "10.1109/A-SSCC53895.2021.9634832",
language = "English",
series = "Proceedings - A-SSCC 2021: IEEE Asian Solid-State Circuits Conference",
publisher = "IEEE",
pages = "1--3",
booktitle = "Proceedings of IEEE Asian Solid-State Circuits Conference (A-SSCC) 2021",
note = "Asian Solid-State Circuit Conference 2021 ; Conference date: 07-11-2021 Through 10-11-2021",
url = "https://www.a-sscc2021.org/",
}