Parvais, B., Hellings, G., Simicic, M., Weckx, P., Mitard, J., Jang, D., Deshpande, V., Van Liempc, B., Veloso, A., Vandooren, A., Waldron, N., Wambacq, P., Collaert, N., & Verkest, D. (2018). Scaling CMOS beyond Si FinFET: An analog/RF perspective. In 2018 48th European Solid-State Device Research Conference, ESSDERC 2018 (pp. 158-161). Article 8486857 (European Solid-State Device Research Conference; Vol. 2018-September). Editions Frontieres, Neuily sur Seine, France. https://doi.org/10.1109/ESSDERC.2018.8486857

@inproceedings{1899114b356245bba120fbf7e2f6e521,
title = "Scaling CMOS beyond Si FinFET: An analog/RF perspective",
abstract = "FinFET has been introduced in the 22/16nm node to continue CMOS logic scaling. The very tight pitches foreseen for the coming generation necessitate the introduction of different scaling boosters. In this paper, we review how these elements affect the analog device performance. The benefits of alternative channel material for dedicated RF applications and the related integration challenges are also discussed.",
author = "B. Parvais and G. Hellings and M. Simicic and P. Weckx and J. Mitard and D. Jang and V. Deshpande and \{Van Liempc\}, B. and A. Veloso and A. Vandooren and N. Waldron and P. Wambacq and N. Collaert and D. Verkest",
year = "2018",
month = oct,
day = "8",
doi = "10.1109/ESSDERC.2018.8486857",
language = "English",
series = "European Solid-State Device Research Conference",
publisher = "Editions Frontieres, Neuily sur Seine, France",
pages = "158--161",
booktitle = "2018 48th European Solid-State Device Research Conference, ESSDERC 2018",
note = "48th European Solid-State Device Research Conference, ESSDERC 2018 ; Conference date: 03-09-2018 Through 06-09-2018",
}