A FinFET VCO and a differential LNA operating at 17 GHz are presented. The LNA contains on-chip input and output baluns, the input balun for the conversion of the single-ended antenna signal, and it achieves a gain of 9.4 dB and a noise figure of 6.6 dB when the output balun is deembedded; the power consumption is 26 mW from a IV supply. The VCO oscillates between 15.3 - 17.1 GHz and reaches a phase noise of -94 dBc/Hz at 1 MHz frequency offset with a power consumption of 7.5 mW. Device characterization data for circuit assessment and performance extrapolation is additionally presented.
Šiprak, D, Wambacq, P, Parvais, B, Mercha, A, Fulde, M, Krüger, JV, Dehan, M & Decoutere, S 2009, FinFET RF receiver building blocks operating above 10 GHz. in ESSCIRC 2009 - Proceedings of the 35th European Solid-State Circuits Conference., 5325986, ESSCIRC 2009 - Proceedings of the 35th European Solid-State Circuits Conference, pp. 360-363, 35th European Solid-State Circuits Conference, ESSCIRC 2009, Athens, Greece, 14/09/09. https://doi.org/10.1109/ESSCIRC.2009.5325986
Šiprak, D., Wambacq, P., Parvais, B., Mercha, A., Fulde, M., Krüger, J. V., Dehan, M., & Decoutere, S. (2009). FinFET RF receiver building blocks operating above 10 GHz. In ESSCIRC 2009 - Proceedings of the 35th European Solid-State Circuits Conference (pp. 360-363). Article 5325986 (ESSCIRC 2009 - Proceedings of the 35th European Solid-State Circuits Conference). https://doi.org/10.1109/ESSCIRC.2009.5325986
@inproceedings{fe00b9d709214dc7babebd1f3a54f53a,
title = "FinFET RF receiver building blocks operating above 10 GHz",
abstract = "A FinFET VCO and a differential LNA operating at 17 GHz are presented. The LNA contains on-chip input and output baluns, the input balun for the conversion of the single-ended antenna signal, and it achieves a gain of 9.4 dB and a noise figure of 6.6 dB when the output balun is deembedded; the power consumption is 26 mW from a IV supply. The VCO oscillates between 15.3 - 17.1 GHz and reaches a phase noise of -94 dBc/Hz at 1 MHz frequency offset with a power consumption of 7.5 mW. Device characterization data for circuit assessment and performance extrapolation is additionally presented.",
author = "Domagoj {\v S}iprak and Piet Wambacq and Bertrand Parvais and Abdelkarim Mercha and Michael Fulde and Kr{\"u}ger, {Jesenka Veledar} and Morin Dehan and Stefaan Decoutere",
year = "2009",
month = dec,
day = "1",
doi = "10.1109/ESSCIRC.2009.5325986",
language = "English",
isbn = "9781424443536",
series = "ESSCIRC 2009 - Proceedings of the 35th European Solid-State Circuits Conference",
pages = "360--363",
booktitle = "ESSCIRC 2009 - Proceedings of the 35th European Solid-State Circuits Conference",
note = "35th European Solid-State Circuits Conference, ESSCIRC 2009 ; Conference date: 14-09-2009 Through 18-09-2009",
}