A FinFET VCO and a differential LNA operating at 17 GHz are presented. The LNA contains on-chip input and output baluns, the input balun for the conversion of the single-ended antenna signal, and it achieves a gain of 9.4 dB and a noise figure of 6.6 dB when the output balun is deem bedded; the power consumption is 26 mW from a 1V supply. The veo oscillates between 15.3 - 17.1 GHz and reaches a phase noise of -94 dBc/Hz at 1 MHz frequency offset with a power consumption of 7.5 mW. Device characterization data for circuit assessment and performance extrapolation is additionally presented.
Šiprak, D, Wambacq, P, Parvais, B, Mercha, A, Fulde, M, Krüger, JV, Dehan, M & Decoutere, S 2009, FinFET RF receiver building blocks operating above 10 GHz. in ESSDERC 2009 - Proceedings of the 39th European Solid-State Device Research Conference., 5331492, ESSDERC 2009 - Proceedings of the 39th European Solid-State Device Research Conference, pp. 347-350, 39th European Solid-State Device Research Conference, ESSDERC 2009, Athens, Greece, 14/09/09. https://doi.org/10.1109/ESSDERC.2009.5331492
Šiprak, D., Wambacq, P., Parvais, B., Mercha, A., Fulde, M., Krüger, J. V., Dehan, M., & Decoutere, S. (2009). FinFET RF receiver building blocks operating above 10 GHz. In ESSDERC 2009 - Proceedings of the 39th European Solid-State Device Research Conference (pp. 347-350). Article 5331492 (ESSDERC 2009 - Proceedings of the 39th European Solid-State Device Research Conference). https://doi.org/10.1109/ESSDERC.2009.5331492
@inproceedings{880603ff5e954581a13830432f124813,
title = "FinFET RF receiver building blocks operating above 10 GHz",
abstract = "A FinFET VCO and a differential LNA operating at 17 GHz are presented. The LNA contains on-chip input and output baluns, the input balun for the conversion of the single-ended antenna signal, and it achieves a gain of 9.4 dB and a noise figure of 6.6 dB when the output balun is deem bedded; the power consumption is 26 mW from a 1V supply. The veo oscillates between 15.3 - 17.1 GHz and reaches a phase noise of -94 dBc/Hz at 1 MHz frequency offset with a power consumption of 7.5 mW. Device characterization data for circuit assessment and performance extrapolation is additionally presented.",
author = "Domagoj {\v S}iprak and Piet Wambacq and Bertrand Parvais and Abdelkarim Mercha and Michael Fulde and Kr{\"u}ger, {Jesenka Veledar} and Morin Dehan and Stefaan Decoutere",
year = "2009",
month = dec,
day = "1",
doi = "10.1109/ESSDERC.2009.5331492",
language = "English",
isbn = "9781424443536",
series = "ESSDERC 2009 - Proceedings of the 39th European Solid-State Device Research Conference",
pages = "347--350",
booktitle = "ESSDERC 2009 - Proceedings of the 39th European Solid-State Device Research Conference",
note = "39th European Solid-State Device Research Conference, ESSDERC 2009 ; Conference date: 14-09-2009 Through 18-09-2009",
}