M. Simicic, M. Simicic, S. Morrison, S. Morrison,
Bertrand Parvais,
Bertrand Parvais, P. Weckx, P. Weckx, B. Kaczer, B. Kaczer, K. Sawada, K. Sawada, H. Ammo, H. Ammo, S. Yamakawa, S. Yamakawa, K. Nomoto, K. Nomoto, M. Ohno, M. Ohno, D. Linten, D. Linten, D. Verkest, D. Verkest,
Piet Wambacq,
Piet Wambacq, G. Groeseneken, G. Groeseneken, G. Gielen, G. Gielen
{\textcopyright} 2017 JSAP. A method for on-chip extraction of random telegraph noise (RTN) parameters from transistors is proposed. Exploiting the nature of exponential distributed RTN events, the proposed circuit enables the automatic extraction of mean RTN time constants from a large array of small-area transistors. The on-chip data processing provides a simplified measurement infrastructure, reduces the measurement time by parallelization and increased efficiency, reduces the data post-processing effort and extends the measurement frequency band. The methodology is demonstrated in a prototype chip fabricated in a 28nm High-k Metal Gate (HK/MG) CMOS technology. The 1.17 mm 2 chip includes two arrays of 18,144 transistors each, analog circuitry for sensing and digitizing the RTN signals and a digital signal processing block. The experimental results agree with expectations.
Simicic, M, Morrison, S, Parvais, B, Weckx, P, Kaczer, B, Sawada, K, Ammo, H, Yamakawa, S, Nomoto, K, Ohno, M, Linten, D, Verkest, D, Wambacq, P, Groeseneken, G & Gielen, G 2017, A fully-integrated method for RTN parameter extraction. in Digest of Technical Papers - Symposium on VLSI Technology. Digest of Technical Papers - Symposium on VLSI Technology, Institute of Electrical and Electronics Engineers Inc., pp. T132-T133, Symposium on VLSI Technology, 31/07/17. https://doi.org/10.23919/VLSIT.2017.7998151
Simicic, M., Morrison, S., Parvais, B., Weckx, P., Kaczer, B., Sawada, K., Ammo, H., Yamakawa, S., Nomoto, K., Ohno, M., Linten, D., Verkest, D., Wambacq, P., Groeseneken, G., & Gielen, G. (2017). A fully-integrated method for RTN parameter extraction. In Digest of Technical Papers - Symposium on VLSI Technology (pp. T132-T133). (Digest of Technical Papers - Symposium on VLSI Technology). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/VLSIT.2017.7998151
@inproceedings{1c1e59e1a3494e0f900fe9d1f84b7135,
title = "A fully-integrated method for RTN parameter extraction",
abstract = "{\textcopyright} 2017 JSAP. A method for on-chip extraction of random telegraph noise (RTN) parameters from transistors is proposed. Exploiting the nature of exponential distributed RTN events, the proposed circuit enables the automatic extraction of mean RTN time constants from a large array of small-area transistors. The on-chip data processing provides a simplified measurement infrastructure, reduces the measurement time by parallelization and increased efficiency, reduces the data post-processing effort and extends the measurement frequency band. The methodology is demonstrated in a prototype chip fabricated in a 28nm High-k Metal Gate (HK/MG) CMOS technology. The 1.17 mm 2 chip includes two arrays of 18,144 transistors each, analog circuitry for sensing and digitizing the RTN signals and a digital signal processing block. The experimental results agree with expectations.",
keywords = "RTN, Random telegraph noise, characterization",
author = "M. Simicic and S. Morrison and B. Parvais and P. Weckx and B. Kaczer and K. Sawada and H. Ammo and S. Yamakawa and K. Nomoto and M. Ohno and D. Linten and D. Verkest and P. Wambacq and G. Groeseneken and G. Gielen",
year = "2017",
month = jul,
day = "31",
doi = "10.23919/VLSIT.2017.7998151",
language = "English",
isbn = "9784863486058",
series = "Digest of Technical Papers - Symposium on VLSI Technology",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "T132--T133",
booktitle = "Digest of Technical Papers - Symposium on VLSI Technology",
address = "United States",
note = " Symposium on VLSI Technology ; Conference date: 31-07-2017 Through 02-08-2017",
}