This work presents in-pixel circuit techniques for burst-mode ultra-high-speed imagers to improve the noise performance while maintaining a dense analog memory storage for each pixel. Together with an AC coupling CDS stage, in-pixel amplification is demonstrated to be useful to improve effective frame depth for longer recording time. Considering the benefits on scaling and power consumption, a 108-cell memory bank (10fF/cell) is implemented inside the pixel. Two types of pixel variations were fabricated in CMOS 130nm technology. The photon transfer curves of both pixel types are measured over different operation speeds up to 20Mfps showing noise performance of both variations to be less than 10e- noise.
Wu, L, San Segundo Bello, D, Coppejans, P, Süss, A, Rosmeulen, M, Craninckx, J, Wambacq, P & Borremans, J 2017, In-Pixel Storage Techniques for CMOS Burst-Mode Ultra-High-Speed Imagers. in International Image Sensor Workshop 2017. pp. 312-315, International Image Sensor Workshop 2017, Hiroshima, Japan, 30/05/17. <http://www.imagesensors.org/Past%20Workshops/2017%20Workshop/2017%20Papers/R38.pdf>
Wu, L., San Segundo Bello, D., Coppejans, P., Süss, A., Rosmeulen, M., Craninckx, J., Wambacq, P., & Borremans, J. (2017). In-Pixel Storage Techniques for CMOS Burst-Mode Ultra-High-Speed Imagers. In International Image Sensor Workshop 2017 (pp. 312-315) http://www.imagesensors.org/Past%20Workshops/2017%20Workshop/2017%20Papers/R38.pdf
@inproceedings{61848a8e545444ea8967178f71b387ce,
title = "In-Pixel Storage Techniques for CMOS Burst-Mode Ultra-High-Speed Imagers",
abstract = "This work presents in-pixel circuit techniques for burst-mode ultra-high-speed imagers to improve the noise performance while maintaining a dense analog memory storage for each pixel. Together with an AC coupling CDS stage, in-pixel amplification is demonstrated to be useful to improve effective frame depth for longer recording time. Considering the benefits on scaling and power consumption, a 108-cell memory bank (10fF/cell) is implemented inside the pixel. Two types of pixel variations were fabricated in CMOS 130nm technology. The photon transfer curves of both pixel types are measured over different operation speeds up to 20Mfps showing noise performance of both variations to be less than 10e- noise.",
author = "Linkun Wu and {San Segundo Bello}, David and Philippe Coppejans and Andreas S{\"u}ss and Maarten Rosmeulen and Jan Craninckx and Piet Wambacq and Jonathan Borremans",
year = "2017",
month = aug,
day = "1",
language = "English",
pages = "312--315",
booktitle = "International Image Sensor Workshop 2017",
note = "International Image Sensor Workshop 2017, IISW2017 ; Conference date: 30-05-2017 Through 02-06-2017",
url = "http://imagesensors.org/2017-international-image-sensor-workshop-iisw/",
}