High-performance computing with FPGAs is gaining momentum with the advent of sophisticated High-Level Synthesis (HLS) tools. The performance of a design is impacted by the input-output bandwidth, the code optimizations and the resource consumption, making the performance estimation a challenge. This paper proposes a performance model which extends the roofline model to take into account the resource consumption and the parameters used in the HLS tools. A strategy is developed which maximizes the performance and the resource utilization within the area of the FPGA. The model is used to optimize the design exploration of a class of window-based image processing application.
Da Silva Gomez, B, Braeken, A, Erik, HD & Touhafi, A 2014, Performance and Resource Modeling for FPGAs using High-Level Synthesis tools. in M Bader, A Bode, H-J Bungartz, M Gerndt, GR Joubert & F Peters (eds), Parallel Computing: Accelerating Computational Science and Engineering (CSE). Advances in Parallel Computing, vol. 25, IOS Press, Amsterdam, pp. 523-531. <http://www.ebooks.iospress.nl/volumearticle/35920>
Da Silva Gomez, B., Braeken, A., Erik, H. D., & Touhafi, A. (2014). Performance and Resource Modeling for FPGAs using High-Level Synthesis tools. In M. Bader, A. Bode, H.-J. Bungartz, M. Gerndt, G. R. Joubert, & F. Peters (Eds.), Parallel Computing: Accelerating Computational Science and Engineering (CSE) (pp. 523-531). (Advances in Parallel Computing; Vol. 25). IOS Press. http://www.ebooks.iospress.nl/volumearticle/35920
@inbook{8d2a59f5d424436b838831793588b9b3,
title = "Performance and Resource Modeling for FPGAs using High-Level Synthesis tools",
abstract = "High-performance computing with FPGAs is gaining momentum with the advent of sophisticated High-Level Synthesis (HLS) tools. The performance of a design is impacted by the input-output bandwidth, the code optimizations and the resource consumption, making the performance estimation a challenge. This paper proposes a performance model which extends the roofline model to take into account the resource consumption and the parameters used in the HLS tools. A strategy is developed which maximizes the performance and the resource utilization within the area of the FPGA. The model is used to optimize the design exploration of a class of window-based image processing application.",
keywords = "Roofline Model, High-Level Synthesis, FPGA",
author = "{Da Silva Gomez}, Bruno and An Braeken and Erik, {H. D'hollander} and Abdellah Touhafi",
note = "Bader, M., Bode, A., Bungartz, H.-J. , Gerndt, M., Joubert, G.R., Peters, F.",
year = "2014",
month = mar,
day = "1",
language = "English",
isbn = "978-1-61499-380-3",
series = "Advances in Parallel Computing",
publisher = "IOS Press",
pages = "523--531",
editor = "Michael Bader and Arndt Bode and Hans-Joachim Bungartz and Michael Gerndt and Joubert, {Gerhard R.} and Frans Peters",
booktitle = "Parallel Computing: Accelerating Computational Science and Engineering (CSE)",
address = "Netherlands",
}