Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies

Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies ■

G. Rzepa, M. Karner, O. Baumgartner, G. Strof, F. Schanovsky, F. Mitterbauer, C. Kernstock, H. W. Karner, P. Weckx, G. Hellings, D. Claes, Z. Wu, Y. Xiang, T. Chiarella, Bertrand Parvais, J. Mitard, J. Franco, B. Kaczer, D. Linten, Z. Stanojevic

Abstract ■

Reliability and variability-aware simulations of logic cells are essential to correctly analyze and predict the performance of upcoming technologies. A simulation flow for DTCO is presented here, which combines the accuracy of TCAD with the performance of SPICE-utilizing parasitic extractions, the impedance field method for variations, and the compact-physics simulator Comphy for reliability. Good agreement with experimental RO performance of iN14 is demonstrated and projections to N3 FinFET and nanosheet technologies are made.