Dedicated processor for hologram calculation using sparse Fourier bases
 
Dedicated processor for hologram calculation using sparse Fourier bases 
 
Daiki Yasuki, David Blinder, Tomoyoshi Shimobaba, Yota Yamamoto, Ikuo Hoshi, Peter Schelkens, Takashi Kakue, Tomoyoshi Ito
 
Abstract 

Recently, a calculation method involving sparse point spread functions in the short-time Fourier transform (STFT) domain was proposed. In this paper, a dedicated processor using the STFT algorithm is described, which is implemented on a field-programmable gate array. All the operations in this algorithm are implemented using fixed-point arithmetic. Since this algorithm includes a trigonometric function and an error function, lookup tables (LUTs) are utilized to reduce the calculation costs. We have devised a dedicated circuit architecture that allows parallel operations. In addition, a central processing unit could generate holograms using the STFT-based algorithm with fixedpoint arithmetic and LUTs at a higher speed than the generation using floating-point arithmetic.