A 70dB DR 10b 0-to-80MS/s current-integrating SAR ADC with adaptive dynamic range

A 70dB DR 10b 0-to-80MS/s current-integrating SAR ADC with adaptive dynamic range ■

Badr Malki, Badr Malki, Badr Malki, Takaya Yamamoto, Takaya Yamamoto, Takaya Yamamoto, Bob Verbruggen, Bob Verbruggen, Bob Verbruggen, Piet Wambacq, Piet Wambacq, Piet Wambacq, J. Craninckx, J. Craninckx, J. Craninckx

Abstract ■

This paper presents a charge-domain SAR ADC which integrates the current of a variable-gain transconductor on its sampling capacitor, rather than being driven by a power hungry voltage buffer. The sampling circuit uses nonlinear MOS capacitors for passive amplification, without compromising linearity. The prototype in 40nm LP CMOS consists of a 1.1-17.6mS transconductor, combined with a 10b 0-80MS/s charge-sharing SAR ADC. It achieves 70 dB DR while consuming less than 5.45mA from a 1.1V supply.