A 2.4 GHz Lower-Power Sixth-Order RF Bandpass Delta Sigma Converter in CMOS

A 2.4 GHz Lower-Power Sixth-Order RF Bandpass Delta Sigma Converter in CMOS ■

Lynn Bos, Lynn Bos, Lynn Bos, Julien Ryckaert, Julien Ryckaert, Julien Ryckaert, Jonathan Borremans, Jonathan Borremans, Jonathan Borremans, Bob Verbruggen, Bob Verbruggen, Bob Verbruggen, Costantino Armiento, Costantino Armiento, Costantino Armiento, Jan Craninckx, Jan Craninckx, Jan Craninckx, G. Van Der Plas, G. Van Der Plas, G. Van Der Plas

Abstract ■

A sixth-order RF bandpass DeltaSigma ADC operating on the 2.4 GHz ISM band, which is suitable for RF digitization is presented. The bandpass loop filter is based on digitally programmable Gm-LC resonators that can be calibrated online to adjust the RF center frequency. By sampling below the input Nyquist frequency, the clock in the system was reduced to 3 GHz, allowing a large reduction of the power consumption. Implemented in a standard 90 nm CMOS process, the IC achieves 40 dB and 62 dB of SNDR and SFDR, respectively, on a 60 MHz bandwidth with 40 mW of power consumption leading to a FoM of 245 GHz/W (4.1 pJ/conversion step). This implementation paves a possible way towards direct RF digitization receiver architectures.