A 52GHz phased-array homodyne receiver front-end with 2 antenna paths is implemented in 90nm digital CMOS. The QVCO and phase selectors provide control over the phase of the LO-signals, allowing beamforming and steering. The receiver achieves a conversion gain of 30dB/path and an NF of 7.1dB/path, yielding a system NF of 4.1dB. The chip consumes 65mW and occupies 0.1mm2.