An ESD-Protected DC-to-6GHz 9.7mW LNA in 90nm Digital CMOS
 
An ESD-Protected DC-to-6GHz 9.7mW LNA in 90nm Digital CMOS 
 
Jonathan Borremans, Piet Wambacq, Dimitri Linten
 
Abstract 

A low cost 50x35um2, DC-6 GHz LNA has been designed in digital 90nm CMOS. It consumes 8.1 mA from a 1.2 V supply, for a minimum NF of 2.5 dB and 17 dB of gain. In the 6 GHz bandwidth, S11 is below -10 dB and the IIP3 varies between -16 and -7 dBm. ESD protection of 3.2 kV HBM is implemented, as well as an optional second stage with gain selection adding up to 4dB of gain.