A 67-mW D-Band FMCW I/Q Radar Receiver With an N-Path Spillover Notch Filter in 28-nm CMOS

A 67-mW D-Band FMCW I/Q Radar Receiver With an N-Path Spillover Notch Filter in 28-nm CMOS ■

Anirudh Kankuppe Raghavendra Swamy, Sehoon Park, Kristof Vaesen, Dae-Woong Park, Barend Van Liempd, Siddhartha Sinha, Piet Wambacq, Jan Craninckx

Abstract ■

A 139.5-157.7-GHz D-band I/Q radar receiver with an on-chip antenna and a spillover resilient N-path baseband filter is presented. Spillover and its manifestation based on the chirp duration are discussed, and a filter for spillover mitigation is implemented. The radar is characterized by 18-GHz radio frequency (RF) bandwidth, 13-mm range resolution, 55-dB conversion gain, 8-dB NF, and 26-dB narrowband spillover attenuation. The receiver is also capable of selectively mitigating close-by large reflectors, and the system power consumption is 67 mW.