Double-gate finFETs as a CMOS technology downscaling option: An RF perspective
 
Double-gate finFETs as a CMOS technology downscaling option: An RF perspective 
 
Sebastien Nuttinck, Bertrand Parvais, Gilberto Curatola, Abdelkarim Mercha
 
Abstract 

Based on careful physical description, the effect of gate-length downscaling on the RF performance of double-gate fin field-effect transistors (finFETs) has been analyzed. Downscaling is beneficial to the device RF performance although the losses due to series parasitics increase. The source/drain series resistance in finFET largely limits the device RF performance, and the losses due to the gate resistance increase with reducing gate length. Double-gate finFETs have the potential to reach the RF International Technology Roadmap for Semiconductor targets in the few decananometer regime, but meeting the specification for gate length in the order of 10 nm may require further improvements.