Aim is to make a comparative study of VLSI implementations of segmentation algorithms. A typical DIMA segmentation algorithm ((multi-)thresholding) has to be selected and a representative set of DDMA segmentation algorithms (eg. split-and-merge, region growing, the Edgmentation algorithm) has to be composed.The project concerns the study of image processing algorithms for VLSI implementation, in order to provide fundamental knowledge on algorithms for the realization of image applications on silicon. The result of this project will be a set of image processing algorithms and architectures, optimized for implementation on ASICs. The project mainly concentrates on the use of segmentation techniques for image coding and enhancement. Segmentation algorithms divide digital images into different regions and are essential for image processing applications in general (coding, feature extraction, ...) and for biomedical image processing applications in particular (pre-processing step for physicians, edge enhancement, ...). A wide variety of these algorithms exists, ranging from simple thresholding techniques to sophisticated region growing algorithms. The concrete aim is to make a comparative study on the impact of alternative segmentation algorithms on their VLSI implementations. First a representative set of segmentation algorithms has to be composed. Following actions have to be undertaken on this set of algorithms: 1. a psycho-visual study of the results of segmentation algorithms 2. a complete overview of the computational and algorithmic complexity of the segmentation algorithms, and a first partitioning of the segmentation algorithms 3. identification of appropriate hardware architectures for the different partitions of the algorithms 4. the consideration of physical implementation such as ASIC, DSP, general purpose micro-processor, etc. Action points (3) and (4) will result in implementation constraints that have to be considered together with the need for a global integration of the different partitions. Therefore new algorithm partitioning rules will be proposed which more closely match these constraints (since it is very unlikely that the partitioning resulting from action point (2) will meet the implementation requirements). This iterative process is repeated until a satisfactory solution has been found. Both the image processing aspects and the VLSI design aspects have to be investigated during the study of the algorithms. Neither of these aspects should be considered on their own. The study of the interaction between these two aspects is essential to a successful VLSI implementation (e.g. a decision that has only a minor influence from the image processing point of view can have a tremendous effect from the VLSI implementation point of view and vice versa).

Runtime: 1995 - 1999