The main implementations of the 2-D binary-tree discrete wavelet decomposition are theoretically analyzed and compared with respect to data-cache performance on instruction-set processor-based realizations. These implementations include various image-scanning techniques, from the classical row-column approach to the block-based and line-based methods, which are proposed in the framework of multimedia-coding standards. Analytical parameterized equations for the prediction of data-cache misses under general realistic assumptions are proposed. The accuracy and the consistency of the theory are verified through simulations on test platforms and a comparison is made with the results from a real platform.
Andreopoulos, I, Schelkens, P, Lafruit, G, Masselos, K & Cornelis, J 2003, 'High-Level Cache Modelling for 2-D Discrete Wavelet Transform Implementations', Journal of VLSI Signal Processing Systems, vol. 34, no. 3, pp. 209-226.
Andreopoulos, I., Schelkens, P., Lafruit, G., Masselos, K., & Cornelis, J. (2003). High-Level Cache Modelling for 2-D Discrete Wavelet Transform Implementations. Journal of VLSI Signal Processing Systems, 34(3), 209-226.
@article{27fb8c8be9294790a56b9a67e7ea5054,
title = "High-Level Cache Modelling for 2-D Discrete Wavelet Transform Implementations",
abstract = "The main implementations of the 2-D binary-tree discrete wavelet decomposition are theoretically analyzed and compared with respect to data-cache performance on instruction-set processor-based realizations. These implementations include various image-scanning techniques, from the classical row-column approach to the block-based and line-based methods, which are proposed in the framework of multimedia-coding standards. Analytical parameterized equations for the prediction of data-cache misses under general realistic assumptions are proposed. The accuracy and the consistency of the theory are verified through simulations on test platforms and a comparison is made with the results from a real platform.",
keywords = "wavelet, hardware implementation, memory optimization",
author = "Ioannis Andreopoulos and Peter Schelkens and Gauthier Lafruit and Kostas Masselos and Jan Cornelis",
note = "Kluwer Journal of VLSI Signal Processing Systems, Vol. 34, Nr. 3, pp. 209-226.",
year = "2003",
month = jul,
language = "English",
volume = "34",
pages = "209--226",
journal = "Journal of VLSI Signal Processing Systems",
issn = "0922-5773",
publisher = "Kluwer Academic Publishers",
number = "3",
}