2.5D/3D technologies require designers to reduce electrostatic discharge (ESD) protection of the internal I/O interfaces. To avoid over-design of ESD protection, designers require a more fundamental understanding of the ESD events that occur at this level. Here we present insights, practical guidelines and research directions for circuit designers and suppliers of bonding tools.
Lin, S-H, Simicic, M & Pantano, N 2024, 'Towards efficient ESD protection strategies for advanced 3D systems-on-chip', Nature reviews electrical engineering, vol. 1, no. 7, pp. 429-431. https://doi.org/10.1038/s44287-024-00071-4
Lin, S.-H., Simicic, M., & Pantano, N. (2024). Towards efficient ESD protection strategies for advanced 3D systems-on-chip. Nature reviews electrical engineering, 1(7), 429-431. https://doi.org/10.1038/s44287-024-00071-4
@article{80381594939f497e992fefe2d3ee79e7,
title = "Towards efficient ESD protection strategies for advanced 3D systems-on-chip",
abstract = "2.5D/3D technologies require designers to reduce electrostatic discharge (ESD) protection of the internal I/O interfaces. To avoid over-design of ESD protection, designers require a more fundamental understanding of the ESD events that occur at this level. Here we present insights, practical guidelines and research directions for circuit designers and suppliers of bonding tools.",
author = "Shih-Hsiang Lin and Marko Simicic and Nicolas Pantano",
year = "2024",
month = jul,
day = "16",
doi = "10.1038/s44287-024-00071-4",
language = "English",
volume = "1",
pages = "429--431",
journal = "Nature reviews electrical engineering",
issn = "2948-1201",
publisher = "Nature Research",
number = "7",
}