We report for the first time a comprehensive comparison of the intra-die matching performance of most advanced multiple gate (MuGFETs) and planar bulk MOSFET technologies in terms of architectures and process modules like the gate stack and source/drain engineering. The impact of Ni-based fully silicided (FUSI) and metal (TiN and TaN) gates for bulk devices, selective epitaxial growth (SEG) and thickness of the Ni salicidation layer for MuGFETs on both threshold voltage (VT) and current factor (β) mismatch is investigated. Taking into account the device DC and matching performances, our measurements show that FUSI planar devices and MuGFETs combining selective epitaxial growth (SEG) and thin Ni salicidation are interesting candidates for applications at the 45nm node and beyond, with VT mismatch of 3.1 and 2.3 mV.μm for n-type devices, respectively.
Gustin, C, Mercha, A, Loo, J, Parvais, B, Subramaniant, V, Dehan, M, Veloso, A, Hoffmann, T, Leys, FE & Decoutere, S 2007, Impact of advanced process modules and device architectures on the matching performance of (sub-)45nm CMOS. in 2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Proceedings of Technical Papers., 4239536, International Symposium on VLSI Technology, Systems, and Applications, Proceedings, 2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA, Hsinchu, Taiwan, Province of China, 23/04/07. https://doi.org/10.1109/VTSA.2007.378968
Gustin, C., Mercha, A., Loo, J., Parvais, B., Subramaniant, V., Dehan, M., Veloso, A., Hoffmann, T., Leys, F. E., & Decoutere, S. (2007). Impact of advanced process modules and device architectures on the matching performance of (sub-)45nm CMOS. In 2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Proceedings of Technical Papers Article 4239536 (International Symposium on VLSI Technology, Systems, and Applications, Proceedings). https://doi.org/10.1109/VTSA.2007.378968
@inproceedings{faabae2a806e4d679bb4479650eb0233,
title = "Impact of advanced process modules and device architectures on the matching performance of (sub-)45nm CMOS",
abstract = "We report for the first time a comprehensive comparison of the intra-die matching performance of most advanced multiple gate (MuGFETs) and planar bulk MOSFET technologies in terms of architectures and process modules like the gate stack and source/drain engineering. The impact of Ni-based fully silicided (FUSI) and metal (TiN and TaN) gates for bulk devices, selective epitaxial growth (SEG) and thickness of the Ni salicidation layer for MuGFETs on both threshold voltage (VT) and current factor (β) mismatch is investigated. Taking into account the device DC and matching performances, our measurements show that FUSI planar devices and MuGFETs combining selective epitaxial growth (SEG) and thin Ni salicidation are interesting candidates for applications at the 45nm node and beyond, with VT mismatch of 3.1 and 2.3 mV.μm for n-type devices, respectively.",
author = "C. Gustin and A. Mercha and J. Loo and B. Parvais and V. Subramaniant and M. Dehan and A. Veloso and T. Hoffmann and Leys, {F. E.} and S. Decoutere",
year = "2007",
month = sep,
day = "26",
doi = "10.1109/VTSA.2007.378968",
language = "English",
isbn = "1424405858",
series = "International Symposium on VLSI Technology, Systems, and Applications, Proceedings",
booktitle = "2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA - Proceedings of Technical Papers",
note = "2007 International Symposium on VLSI Technology, Systems and Applications, VLSI-TSA ; Conference date: 23-04-2007 Through 25-04-2007",
}